
In this section, we explore the world of programming, algorithms, networks, and infrastructure

Overlay networks let containers on different hosts communicate as if they shared a single flat network, forming the backbone of most cloud-native microservices apps. This article covers how to build, encrypt, and test a Docker overlay network across a Swarm cluster, and explains the VXLAN tunneling technology powering it behind the scenes.
Containers get a temporary writable layer by default, which disappears the moment a container is deleted — fine for scratch data, but risky for anything worth keeping. This article explains how Docker volumes decouple persistent data from container lifecycles, and walks through creating, using, and sharing them safely.
Docker's security model is built on layered defense, combining well-established Linux kernel technologies with sensible defaults out of the box. This article explains how namespaces, control groups, capabilities, mandatory access control, and seccomp work together to isolate and secure containers.
Every program a person writes eventually becomes electrical signals moving through silicon. This article explains what computer architecture actually studies, walks through the eight foundational ideas that shape modern processor design, and traces the journey a program takes from human-readable code down to the hardware that runs it.
Opening up a computer reveals a small set of recurring building blocks that work together regardless of the device's size or purpose. This article walks through the core hardware components every system relies on, explains how those components are physically manufactured from raw silicon, and shows the correct way to measure and compare processor performance.
For decades, processors got faster mainly by running at higher clock speeds. That approach hit a physical limit tied to power consumption and heat, forcing the entire industry to change direction toward multiple processing cores instead. This article explains why the power wall happened, how the industry responded with multiprocessors, what real benchmark numbers reveal about performance claims, and common misconceptions to avoid when reasoning about hardware performance.
Every high-level statement a programmer writes eventually breaks down into a small, rigid set of hardware-level operations. This article explains why instruction sets are kept deliberately simple, walks through the core arithmetic and data-movement operations a processor supports, and explains how operands such as registers and memory locations are represented and accessed at the hardware level.
Underneath every value a program manipulates and every instruction a processor executes lies a fixed-width string of bits. This article explains how signed and unsigned numbers are represented and interpreted differently from the same binary pattern, and how machine instructions themselves are encoded into rigid binary fields that hardware can decode at high speed.
Beyond arithmetic, processors need to manipulate individual bits and alter their execution path based on conditions. This article covers the core logical operations used for bit manipulation and explains how conditional branching and looping are built from a small set of comparison-based instructions.
Calling a function seems simple in high-level code, but at the hardware level it requires a careful protocol for saving return addresses, passing arguments, and preserving register values. This article explains how procedure calls are implemented using dedicated registers and a stack, then covers how processors represent human-readable text as sequences of encoded characters.
A 32-bit instruction cannot fit a large constant or a far-away memory address directly inside it, and multiple processors sharing memory cannot safely update the same data without coordination. This article explains how RISC-V builds large immediate values and addresses out of smaller pieces, and how atomic instructions allow parallel programs to synchronize safely.
Turning a C program into something the operating system can actually run involves several distinct translation stages, each producing a different intermediate file. This article walks through that full pipeline from compiler to loader, then applies the concepts from this chapter to a complete, realistic example: translating a C sorting routine into RISC-V assembly step by step.